Tiny Core Base > Other architectures

RiscV

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limacon:
Hey all.

I've been working on a custom RiscV Soc based on VexRisc - written in SpinalHDL (on top of scala).

https://github.com/SpinalHDL/VexRiscv

Learn more about SpinalHDL here
https://www.youtube.com/watch?v=dRhmH2eW7w4

Long term goal is to boot Tiny Core. :-)

limacon:
Another RiscV SoC is the LowRisc project
http://www.lowrisc.org/

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